[PATCH] D82763: MIR: Infer not-SSA for subregister defs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked an inline comment as done.
arsenm added inline comments.


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Comment at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:453
+  /// specified register, otherwise nullptr.
+  MachineOperand *getOneDef(Register Reg) const {
+    def_iterator DI = def_begin(Reg);
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thegameg wrote:
> There is a `MachineInstr *getUniqueVRegDef(Register Reg) const;`. Maybe name this one `getUniqueVRegDefOperand`? Are they actually vreg-only?
I guess this would technically work for physical registers. I picked the name to mirror the existing hasOneDef just above


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