[PATCH] D82510: [PowerPC][Power10] Implement low-order Vector Multiply, Modulus and Divide Instructions

[Lei Huang via Phabricator via llvm-commits]

lei added a comment.

This LGTM, just wondering why you have not included testing for BE.



================
Comment at: llvm/test/CodeGen/PowerPC/p10-vector-divide.ll:3
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s
----------------
BE tests?


================
Comment at: llvm/test/CodeGen/PowerPC/p10-vector-modulo.ll:4
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s
+
----------------
BE tests?


================
Comment at: llvm/test/CodeGen/PowerPC/p10-vector-multiply.ll:3
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s
----------------
BE?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82510/new/

https://reviews.llvm.org/D82510