[PATCH] D81648: MIR Statepoint refactoring. Part 4: ISEL changes.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 7 14:14:38 PDT 2020
reames added a comment.
Initial comments, continue to look for other suggestions.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp:228
+// Return true if V is a values which need not to be relocated/spilled.
+static bool isConstantVal(SDValue V) {
----------------
Rebase on commit b172cd781.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp:533
// Before we actually start lowering (and allocating spill slots for values),
// reserve any stack slots which we judge to be profitable to reuse for a
----------------
Please replace your modifications to this function with the following:
DenseSet<SDValue> LowerAsVReg;
if (UseRegistersForGCPointers && isa<CallInst>(SI.StatepointInstr)) {
for (unsigned i = 0; i < SI.Bases.size(); ++i) {
if (willDirectlyLower(getValue(SI.Bases[i])) || <is vector type>
continue;
LowerAsVReg.insert(getValue(SI.Bases[i]));
if (LowerAsVReg.size() == N) break;
}
}
auto requireSpillSlot = [&](const Value *V) {
if (isGCValue(V))
return LowerAsVReg.contains(getValue(V)));
return !(LiveInDeopt || UseRegistersForDeoptValues);
};
Repository:
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https://reviews.llvm.org/D81648/new/
https://reviews.llvm.org/D81648
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