[PATCH] D83313: [MachineOutliner] Fix liveness computing.

Yvan Roux via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 7 08:22:04 PDT 2020


yroux created this revision.
yroux added reviewers: paquette, samparker, efriedma, SjoerdMeijer, dmgreen.
Herald added subscribers: llvm-commits, kristof.beyls.
Herald added a project: LLVM.

There are targets, such as ARM, where if-conversion can insert a predicated terminator when merging blocks. On ARM this instruction (BX_RET) doesn't contain the information that it uses the link register (this is handled by addLiveOuts which will add calle saved regtisters if needed), thus the current implementation might miss this link register usage wrongly insert an outlined call without saving it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83313

Files:
  llvm/include/llvm/CodeGen/MachineOutliner.h
  llvm/test/CodeGen/ARM/machine-outliner-liveness.ll

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