[PATCH] D83207: [AMDGPU] Update isFMAFasterThanFMulAndFAdd assumptions

[Carl Ritson via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG560292fa990a: [AMDGPU] Update isFMAFasterThanFMulAndFAdd assumptions (authored by critson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83207/new/

https://reviews.llvm.org/D83207

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -4277,10 +4277,13 @@
 
   switch (VT.getSimpleVT().SimpleTy) {
   case MVT::f32: {
-    // This is as fast on some subtargets. However, we always have full rate f32
-    // mad available which returns the same result as the separate operations
-    // which we should prefer over fma. We can't use this if we want to support
-    // denormals, so only report this in these cases.
+    // If mad is not available this depends only on if f32 fma is full rate.
+    if (!Subtarget->hasMadMacF32Insts())
+      return Subtarget->hasFastFMAF32();
+
+    // Otherwise f32 mad is always full rate and returns the same result as
+    // the separate operations so should be preferred over fma.
+    // However does not support denomals.
     if (hasFP32Denormals(MF))
       return Subtarget->hasFastFMAF32() || Subtarget->hasDLInsts();
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D83207.275919.patch
Type: text/x-patch
Size: 1043 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200707/7f4b7dc9/attachment-0001.bin>