[PATCH] D83020: [AMDGPU] Avoid using s_cmpk when src0 is not register

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 6 12:54:02 PDT 2020


arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/test/CodeGen/AMDGPU/cmp_shrink.mir:5
+# GCN: bb.0:
+# GCN-NOT: S_CMPK_GT_I32
+---
----------------
ruiling wrote:
> arsenm wrote:
> > positive checks are more useful. Also you can just generate these checks. Can you reproduce this with an IR test too?
> will try positive check, how to generate the checks? could you give a little bit more info? The original test case that hit the issue is over-complex I think. Normally, a constant expression at IR level is easy to be optimized off by the middle-end. so I think a .mir test is enough for this issue.
So what is the context this appears? Why wasn't it optimized out?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83020/new/

https://reviews.llvm.org/D83020





More information about the llvm-commits mailing list