[PATCH] D82359: [Power10] Implement Vector Replace Builtins in LLVM/Clang

[Lei Huang via Phabricator via llvm-commits]

lei added inline comments.


================
Comment at: clang/lib/Headers/altivec.h:17037
+  })(x))                                                                       \
+      .ui
+#define DP2LL(x)                                                               \
----------------
This looks just like a cast to `unsigned int`, can you explain why it needs to be cast to a union to extract the unsigned int instead of just directly casting it to an `unsigned int`?


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Comment at: clang/lib/Headers/altivec.h:17044
+      .ull
+
+
----------------
nit: remove extra empty line.


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Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:519
+  // CHECK-BE-NEXT: ret <4 x i32>
+  // CHECK-LE: @llvm.ppc.altivec.vinsw(<4 x i32> %{{.+}}, i64 %{{.+}}, i32 12
+  // CHECK-LE-NEXT: ret <4 x i32>
----------------
I don't see why you have 2 different CHECK prefix for the same run line.  Seems redundant to me. Please update to just use `CHECK`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82359/new/

https://reviews.llvm.org/D82359