[PATCH] D83204: [ARM] More unpredicatable VCVT instructions.
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 6 12:53:32 PDT 2020
dmgreen updated this revision to Diff 275626.
dmgreen added a comment.
Update test.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83204/new/
https://reviews.llvm.org/D83204
Files:
llvm/lib/Target/ARM/ARMInstrVFP.td
llvm/test/CodeGen/Thumb2/mve-vcvt.ll
llvm/unittests/Target/ARM/MachineInstrTest.cpp
Index: llvm/unittests/Target/ARM/MachineInstrTest.cpp
===================================================================
--- llvm/unittests/Target/ARM/MachineInstrTest.cpp
+++ llvm/unittests/Target/ARM/MachineInstrTest.cpp
@@ -1103,8 +1103,8 @@
for (unsigned Op = 0; Op < ARM::INSTRUCTION_LIST_END; ++Op) {
const MCInstrDesc &Desc = TII->get(Op);
- if ((Desc.TSFlags & ARMII::DomainMask) != ARMII::DomainMVE &&
- (Desc.TSFlags & ARMII::DomainMask) != ARMII::DomainVFP)
+ if (((Desc.TSFlags & ARMII::DomainMask) &
+ (ARMII::DomainMVE | ARMII::DomainVFP | ARMII::DomainNEONA8)) == 0)
continue;
if (UnpredictableOpcodes.count(Op))
continue;
Index: llvm/test/CodeGen/Thumb2/mve-vcvt.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/mve-vcvt.ll
+++ llvm/test/CodeGen/Thumb2/mve-vcvt.ll
@@ -45,8 +45,8 @@
; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s0
; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s1
-; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s3
; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s2
+; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s3
; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov.32 q0[0], r0
; CHECK-MVE-NEXT: vmov r0, s6
@@ -71,8 +71,8 @@
; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s0
; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s1
-; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s3
; CHECK-MVE-NEXT: vcvt.u32.f32 s10, s2
+; CHECK-MVE-NEXT: vcvt.u32.f32 s8, s3
; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov.32 q0[0], r0
; CHECK-MVE-NEXT: vmov r0, s6
Index: llvm/lib/Target/ARM/ARMInstrVFP.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrVFP.td
+++ llvm/lib/Target/ARM/ARMInstrVFP.td
@@ -1600,6 +1600,7 @@
// Some single precision VFP instructions may be executed on both NEON and
// VFP pipelines on A8.
let D = VFPNeonA8Domain;
+ let hasSideEffects = 0;
}
def : VFPNoNEONPat<(i32 (fp_to_sint SPR:$a)),
@@ -1647,6 +1648,7 @@
// Some single precision VFP instructions may be executed on both NEON and
// VFP pipelines on A8.
let D = VFPNeonA8Domain;
+ let hasSideEffects = 0;
}
def : VFPNoNEONPat<(i32 (fp_to_uint SPR:$a)),
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