[PATCH] D83240: [AMDGPU][GlobalISel] Fix G_AMDGPU_TBUFFER_STORE_FORMAT mapping
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 6 12:52:35 PDT 2020
arsenm requested changes to this revision.
arsenm added inline comments.
This revision now requires changes to proceed.
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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.d16.ll:1-4
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -global-isel | FileCheck -enable-var-scope -check-prefixes=GCN,UNPACKED,PREGFX10,PREGFX10-UNPACKED %s
+; RUN: llc < %s -march=amdgcn -mcpu=gfx810 -verify-machineinstrs -global-isel | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s
+; RUN: llc < %s -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -global-isel | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,PREGFX10,PREGFX10-PACKED %s
+; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -global-isel | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED,GFX10,GFX10-PACKED %s
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Can you move the -global-isel argument to the beginning?
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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll:1-3
+;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs -global-isel | FileCheck -check-prefixes=GCN,VERDE,PREGFX10 %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -global-isel | FileCheck -check-prefixes=GCN,PREGFX10 %s
+;RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -global-isel | FileCheck -check-prefixes=GCN,GFX10 %s
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Ditto (also space between ; and RUN)
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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll:31
+main_body:
+ %in1 = bitcast <4 x float> %1 to <4 x i32>
+ call void @llvm.amdgcn.raw.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 42, i32 0, i32 117, i32 0)
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You can just make the argument types the result instead of having the bitcast
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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll:75
+}
+
+declare void @llvm.amdgcn.raw.tbuffer.store.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
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Can you also add cases that require waterfall loops? I think the part to handle them is missing
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D83240/new/
https://reviews.llvm.org/D83240
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