[PATCH] D82499: [DAGCombiner] tighten constraints for fma fold

Cameron McInally via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 6 10:34:08 PDT 2020


cameron.mcinally accepted this revision.
cameron.mcinally added a comment.
This revision is now accepted and ready to land.

LGTM, but I encourage others to review too.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:11991
     E = N0;
   }
   if (FMA && E) {
----------------
Do we need to check `Aggressive` here? For a hypothetical target with 2 FMUL/FADD ports and 1 FMA port, assuming slow FMAs, this could be a performance loss.

It shouldn't be a problem for modern chips that I care about, so just picking nits.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82499/new/

https://reviews.llvm.org/D82499





More information about the llvm-commits mailing list