[PATCH] D83111: [X86-64] Support Intel AMX Intrinsic

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: clang/lib/Headers/amxintrin.h:22
+/// Load tile configuration from a 64-byte memory location specified by
+/// "mem_addr". The tile configuration format is specified below, and includes
+/// the tile type palette, the number of bytes per row, and the number of rows.
----------------
The format isn't described below. I don't think it needs to be. But we shouldn't say it is described.


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Comment at: clang/lib/Headers/amxintrin.h:41
+/// Stores the current tile configuration to a 64-byte memory location specified
+/// by "mem_addr". The tile configuration format is specified below, and
+/// includes the tile type palette, the number of bytes per row, and the number
----------------
same


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Comment at: clang/lib/Sema/SemaChecking.cpp:3613
+                                    ArrayRef<int> ArgNums,
+                                    int Low, int High) {
+  for (int ArgNum : ArgNums) {
----------------
Why are Low/High arguments? Aren't they always 0 and 7.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83111/new/

https://reviews.llvm.org/D83111