[PATCH] D81651: [AMDGPU][CODEGEN] Added support of new inline assembler constraints
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 2 07:32:01 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1c9d681092d1: [AMDGPU][CODEGEN] Added support of new inline assembler constraints (authored by dp).
Changed prior to commit:
https://reviews.llvm.org/D81651?vs=273284&id=275115#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81651/new/
https://reviews.llvm.org/D81651
Files:
llvm/docs/LangRef.rst
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.h
llvm/test/CodeGen/AMDGPU/inline-constraints.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D81651.275115.patch
Type: text/x-patch
Size: 42850 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200702/de20168f/attachment.bin>
More information about the llvm-commits
mailing list