[lld] 0aad829 - [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-07-01T23:59:01-07:00
New Revision: 0aad82943af946d1a1821998c0804ae40227051d

URL: https://github.com/llvm/llvm-project/commit/0aad82943af946d1a1821998c0804ae40227051d
DIFF: https://github.com/llvm/llvm-project/commit/0aad82943af946d1a1821998c0804ae40227051d.diff

LOG: [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment.

The default CPU used by llvm-mc doesn't have the NOPL feature, but
if we know we're compiling in 64-bit mode we should be able to
use nopl.

Added: 
    

Modified: 
    lld/test/COFF/lto.ll
    llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
    llvm/test/MC/X86/align-branch-bundle.s
    llvm/test/MC/X86/align-branch-pad-max-prefix.s

Removed: 
    


################################################################################
diff  --git a/lld/test/COFF/lto.ll b/lld/test/COFF/lto.ll
index d8ccf566939e..b23609cc86a0 100644
--- a/lld/test/COFF/lto.ll
+++ b/lld/test/COFF/lto.ll
@@ -86,21 +86,8 @@
 ; TEXT-10-EMPTY:
 ; TEXT-10-NEXT: <.text>:
 ; TEXT-10-NEXT: retq
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
+; TEXT-10-NEXT: nopw %cs:(%rax,%rax)
+; TEXT-10-NEXT: nopl (%rax,%rax)
 ; TEXT-10-NEXT: retq
 ; TEXT-10-NEXT: int3
 ; TEXT-10-NEXT: int3

diff  --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index e49ee1792373..bf3b6bcb5463 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1096,7 +1096,7 @@ bool X86AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
 
   // This CPU doesn't support long nops. If needed add more.
   // FIXME: We could generated something better than plain 0x90.
-  if (!STI.getFeatureBits()[X86::FeatureNOPL]) {
+  if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Mode64Bit)) {
     for (uint64_t i = 0; i < Count; ++i)
       OS << '\x90';
     return true;

diff  --git a/llvm/test/MC/X86/align-branch-bundle.s b/llvm/test/MC/X86/align-branch-bundle.s
index 43dabca9e477..a62159943683 100644
--- a/llvm/test/MC/X86/align-branch-bundle.s
+++ b/llvm/test/MC/X86/align-branch-bundle.s
@@ -6,7 +6,6 @@
 # CHECK-NEXT:       1:       testq    $2, %rdx
 # CHECK-NEXT:       8:       jne
 # CHECK-NEXT:       e:       nop
-# CHECK-NEXT:       f:       nop
 # CHECK-NEXT:      10:       jle
 
     .text

diff  --git a/llvm/test/MC/X86/align-branch-pad-max-prefix.s b/llvm/test/MC/X86/align-branch-pad-max-prefix.s
index 6cce49d55d47..9576562667ac 100644
--- a/llvm/test/MC/X86/align-branch-pad-max-prefix.s
+++ b/llvm/test/MC/X86/align-branch-pad-max-prefix.s
@@ -10,9 +10,7 @@
   # following nops, doing so would make the jmp misaligned.
 # CHECK:      18:          jmp
   jmp bar
-# CHECK:      1d:          nop
-# CHECK:      1e:          nop
-# CHECK:      1f:          nop
+# CHECK:      1d:          nopl (%rax)
 # CHECK:      20:          int3
   .p2align 5
   int3