[llvm] 3367e9d - [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment.
Topper, Craig via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 1 15:22:34 PDT 2020
Thanks. I’ve reverted and will try to build lld and update the tests before recommitting.
From: Matt Morehouse <mascasa at google.com>
Sent: Wednesday, July 1, 2020 3:15 PM
To: Topper, Craig <craig.topper at intel.com>; Craig Topper <llvmlistbot at llvm.org>
Cc: llvm-commits <llvm-commits at lists.llvm.org>
Subject: Re: [llvm] 3367e9d - [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment.
This commit seems to be causing the LLD COFF/lto.ll test to fail: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/43382/steps/check-lld%20ubsan/logs/stdio
Could you please take a look?
/b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/COFF/lto.ll:91:17: error: TEXT-10-NEXT: expected string not found in input
; TEXT-10-NEXT: nop
^
<stdin>:10:30: note: scanning from here
14000100b: 0f 1f 44 00 00 nopl (%rax,%rax)
^
<stdin>:12:16: note: possible intended match here
140001011: cc int3
^
Input file: <stdin>
Check file: /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/COFF/lto.ll
-dump-input=help describes the format of the following dump.
Full input was:
<<<<<<
1:
2: /b/sanitizer-x86_64-linux-fast/build/llvm_build_ubsan/tools/lld/test/COFF/Output/main.exe: file format coff-x86-64
3:
4:
5: Disassembly of section .text:
6:
7: 0000000140001000 <.text>:
8: 140001000: c3 retq
9: 140001001: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:(%rax,%rax)
10: 14000100b: 0f 1f 44 00 00 nopl (%rax,%rax)
next:91'0 X~~~~~~~~~~~~ error: no match found
11: 140001010: c3 retq
next:91'0 ~~~~~~~~~~~~~~~~~~
12: 140001011: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
next:91'1 ? possible intended match
13: 140001012: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
14: 140001013: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
15: 140001014: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
16: 140001015: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
17: 140001016: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
18: 140001017: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
19: 140001018: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
20: 140001019: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
21: 14000101a: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
22: 14000101b: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
23: 14000101c: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
24: 14000101d: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
25: 14000101e: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
26: 14000101f: cc int3
next:91'0 ~~~~~~~~~~~~~~~~~~
27: 140001020: 48 83 ec 28 subq $40, %rsp
next:91'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
28: 140001024: e8 d7 ff ff ff callq 0x140001000 <.text>
next:91'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29: 140001029: 31 c0 xorl %eax, %eax
next:91'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
30: 14000102b: 48 83 c4 28 addq $40, %rsp
next:91'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31: 14000102f: c3 retq
next:91'0 ~~~~~~~~~~~~~~~~~~
>>>>>>
On Wed, Jul 1, 2020 at 10:57 AM Craig Topper via llvm-commits <llvm-commits at lists.llvm.org<mailto:llvm-commits at lists.llvm.org>> wrote:
Author: Craig Topper
Date: 2020-07-01T10:57:24-07:00
New Revision: 3367e9dac56024147bbd916c40bfe6a4ee61079b
URL: https://github.com/llvm/llvm-project/commit/3367e9dac56024147bbd916c40bfe6a4ee61079b
DIFF: https://github.com/llvm/llvm-project/commit/3367e9dac56024147bbd916c40bfe6a4ee61079b.diff
LOG: [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment.
The default CPU used by llvm-mc doesn't have the NOPL feature, but
if we know we're compiling in 64-bit mode we should be able to
use nopl.
Added:
Modified:
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
llvm/test/MC/X86/align-branch-bundle.s
llvm/test/MC/X86/align-branch-pad-max-prefix.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index e49ee1792373..bf3b6bcb5463 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1096,7 +1096,7 @@ bool X86AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
// This CPU doesn't support long nops. If needed add more.
// FIXME: We could generated something better than plain 0x90.
- if (!STI.getFeatureBits()[X86::FeatureNOPL]) {
+ if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Mode64Bit)) {
for (uint64_t i = 0; i < Count; ++i)
OS << '\x90';
return true;
diff --git a/llvm/test/MC/X86/align-branch-bundle.s b/llvm/test/MC/X86/align-branch-bundle.s
index 43dabca9e477..a62159943683 100644
--- a/llvm/test/MC/X86/align-branch-bundle.s
+++ b/llvm/test/MC/X86/align-branch-bundle.s
@@ -6,7 +6,6 @@
# CHECK-NEXT: 1: testq $2, %rdx
# CHECK-NEXT: 8: jne
# CHECK-NEXT: e: nop
-# CHECK-NEXT: f: nop
# CHECK-NEXT: 10: jle
.text
diff --git a/llvm/test/MC/X86/align-branch-pad-max-prefix.s b/llvm/test/MC/X86/align-branch-pad-max-prefix.s
index 6cce49d55d47..9576562667ac 100644
--- a/llvm/test/MC/X86/align-branch-pad-max-prefix.s
+++ b/llvm/test/MC/X86/align-branch-pad-max-prefix.s
@@ -10,9 +10,7 @@
# following nops, doing so would make the jmp misaligned.
# CHECK: 18: jmp
jmp bar
-# CHECK: 1d: nop
-# CHECK: 1e: nop
-# CHECK: 1f: nop
+# CHECK: 1d: nopl (%rax)
# CHECK: 20: int3
.p2align 5
int3
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