[llvm] 93707fe - [X86][SSE] Add test showing incorrect sign-extension by targetShrinkDemandedConstant
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 1 04:01:37 PDT 2020
Author: Simon Pilgrim
Date: 2020-07-01T12:01:19+01:00
New Revision: 93707fe30927b19b533f04426a6614f952f49dd1
URL: https://github.com/llvm/llvm-project/commit/93707fe30927b19b533f04426a6614f952f49dd1
DIFF: https://github.com/llvm/llvm-project/commit/93707fe30927b19b533f04426a6614f952f49dd1.diff
LOG: [X86][SSE] Add test showing incorrect sign-extension by targetShrinkDemandedConstant
Added:
llvm/test/CodeGen/X86/shrink-const.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/shrink-const.ll b/llvm/test/CodeGen/X86/shrink-const.ll
new file mode 100644
index 000000000000..32458afd4a9c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/shrink-const.ll
@@ -0,0 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+
+; FIXME: If targetShrinkDemandedConstant extends xor/or constants ensure it extends from the msb of the active bits
+define <4 x i32> @sext_vector_constants(<4 x i32> %a0) {
+; SSE-LABEL: sext_vector_constants:
+; SSE: # %bb.0:
+; SSE-NEXT: pslld $17, %xmm0
+; SSE-NEXT: pand {{.*}}(%rip), %xmm0
+; SSE-NEXT: retq
+;
+; AVX-LABEL: sext_vector_constants:
+; AVX: # %bb.0:
+; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4227858432,4227858432,4227858432,4227858432]
+; AVX-NEXT: vpslld $17, %xmm0, %xmm0
+; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
+; AVX-NEXT: retq
+ %1 = lshr <4 x i32> %a0, <i32 9, i32 9, i32 9, i32 9>
+ %2 = xor <4 x i32> %1, <i32 314523200, i32 -2085372448, i32 144496960, i32 1532773600>
+ %3 = shl <4 x i32> %2, <i32 26, i32 26, i32 26, i32 26>
+ ret <4 x i32> %3
+}
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