[PATCH] D82705: [X86-64] Support Intel AMX instructions
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 30 20:03:56 PDT 2020
craig.topper marked 2 inline comments as done.
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp:783
+ case TYPE_TMM: \
+ if (index > 7) \
+ *valid = 0; \
----------------
Here's the range check for tmm0-tmm7 I added
================
Comment at: llvm/test/MC/X86/AMX/x86-64-amx-error.s:8
+tileloaddt1 1(%rip), %tmm1
+
+// CHECK: invalid operand for instruction
----------------
LuoYuanke wrote:
> Do we have an error case that test the register number should be constrained to tmm0 ~ tmm7? Both for assembly and disassembly?
The assembler can’t parse a register that doesnt have a name. Only tmm0-7 are defined.
I fixed the disassembler earlier today.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82705/new/
https://reviews.llvm.org/D82705
More information about the llvm-commits
mailing list