[llvm] e9eab30 - GlobalISel: Disallow undef generic virtual register uses

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-06-30T19:18:01-04:00
New Revision: e9eab30339a70596386b175b415167cc97e062d5

URL: https://github.com/llvm/llvm-project/commit/e9eab30339a70596386b175b415167cc97e062d5
DIFF: https://github.com/llvm/llvm-project/commit/e9eab30339a70596386b175b415167cc97e062d5.diff

LOG: GlobalISel: Disallow undef generic virtual register uses

With an undef operand, it's possible for getVRegDef to fail and return
null. This is an edge case very little code bothered to
consider. Proper gMIR should use G_IMPLICIT_DEF instead.

I initially tried to apply this restriction to all SSA MIR, so then
getVRegDef would never fail anywhere. However, ProcessImplicitDefs
does technically run while the function is in SSA. ProcessImplicitDefs
and DetectDeadLanes would need to either move, or a new pseudo-SSA
type of function property would need to be introduced.

Added: 
    llvm/test/MachineVerifier/generic-vreg-undef-use.mir

Modified: 
    llvm/lib/CodeGen/MachineVerifier.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index c032b6989c86..d19e295538d7 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1695,6 +1695,15 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
       if (!RC) {
         // This is a generic virtual register.
 
+        // Do not allow undef uses for generic virtual registers. This ensures
+        // getVRegDef can never fail and return null on a generic register.
+        //
+        // FIXME: This restriction should probably be broadened to all SSA
+        // MIR. However, DetectDeadLanes/ProcessImplicitDefs technically still
+        // run on the SSA function just before phi elimination.
+        if (MO->isUndef())
+          report("Generic virtual register use cannot be undef", MO, MONum);
+
         // If we're post-Select, we can't have gvregs anymore.
         if (isFunctionSelected) {
           report("Generic virtual register invalid in a Selected function",

diff  --git a/llvm/test/MachineVerifier/generic-vreg-undef-use.mir b/llvm/test/MachineVerifier/generic-vreg-undef-use.mir
new file mode 100644
index 000000000000..d35ca6183188
--- /dev/null
+++ b/llvm/test/MachineVerifier/generic-vreg-undef-use.mir
@@ -0,0 +1,25 @@
+# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
+
+# Undef uses are illegal for generic vregs.
+
+---
+name:            test_undef_use
+liveins:
+body:             |
+  bb.0:
+    %0:_(s32) = G_CONSTANT i32 0
+
+    ; Test generic instruction
+    ; CHECK: *** Bad machine code: Generic virtual register use cannot be undef ***
+    G_STORE %0, undef %1:_(p0) :: (store 4)
+
+    ; Make sure this fails on a post-isel generic instruction.
+    ; CHECK: *** Bad machine code: Generic virtual register use cannot be undef ***
+    $x0 = COPY undef %2:_(s64)
+
+    ; Make sure this fails with a target instruction
+    ; CHECK: *** Bad machine code: Generic virtual register use cannot be undef ***
+    RET_ReallyLR implicit $x0, implicit undef %3:_(s32)
+...
+