[llvm] 0ec712a - [BitcodeReader] Fix DelayedShuffle handling for ConstantExpr shuffles.
Eli Friedman via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 30 13:23:23 PDT 2020
Author: Eli Friedman
Date: 2020-06-30T13:23:07-07:00
New Revision: 0ec712afec642fa6a57fe17be0c8d7d096bf7434
URL: https://github.com/llvm/llvm-project/commit/0ec712afec642fa6a57fe17be0c8d7d096bf7434
DIFF: https://github.com/llvm/llvm-project/commit/0ec712afec642fa6a57fe17be0c8d7d096bf7434.diff
LOG: [BitcodeReader] Fix DelayedShuffle handling for ConstantExpr shuffles.
The indexing was messed up, so the result was completely broken.
Shuffle constant exprs are rare in practice; without vscale types,
constant folding generally elminates them. So sort of hard to trip over.
Fixes regression from D72467.
(Recommitting after fix for memory leak.)
Differential Revision: https://reviews.llvm.org/D80330
Added:
llvm/test/Bitcode/vscale-shuffle.ll
Modified:
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
index 813c1b3a03be..4471302c05d7 100644
--- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -2335,6 +2335,7 @@ Error BitcodeReader::parseConstants() {
uint64_t Op0Idx;
uint64_t Op1Idx;
uint64_t Op2Idx;
+ unsigned CstNo;
};
std::vector<DelayedShufTy> DelayedShuffles;
while (true) {
@@ -2348,9 +2349,6 @@ Error BitcodeReader::parseConstants() {
case BitstreamEntry::Error:
return error("Malformed block");
case BitstreamEntry::EndBlock:
- if (NextCstNo != ValueList.size())
- return error("Invalid constant reference");
-
// Once all the constants have been read, go through and resolve forward
// references.
//
@@ -2363,6 +2361,7 @@ Error BitcodeReader::parseConstants() {
uint64_t Op0Idx = DelayedShuffle.Op0Idx;
uint64_t Op1Idx = DelayedShuffle.Op1Idx;
uint64_t Op2Idx = DelayedShuffle.Op2Idx;
+ uint64_t CstNo = DelayedShuffle.CstNo;
Constant *Op0 = ValueList.getConstantFwdRef(Op0Idx, OpTy);
Constant *Op1 = ValueList.getConstantFwdRef(Op1Idx, OpTy);
Type *ShufTy =
@@ -2373,9 +2372,12 @@ Error BitcodeReader::parseConstants() {
SmallVector<int, 16> Mask;
ShuffleVectorInst::getShuffleMask(Op2, Mask);
Value *V = ConstantExpr::getShuffleVector(Op0, Op1, Mask);
- ValueList.assignValue(V, NextCstNo, DelayedShuffle.CurFullTy);
- ++NextCstNo;
+ ValueList.assignValue(V, CstNo, DelayedShuffle.CurFullTy);
}
+
+ if (NextCstNo != ValueList.size())
+ return error("Invalid constant reference");
+
ValueList.resolveConstantForwardRefs();
return Error::success();
case BitstreamEntry::Record:
@@ -2735,7 +2737,8 @@ Error BitcodeReader::parseConstants() {
if (Record.size() < 3 || !OpTy)
return error("Invalid record");
DelayedShuffles.push_back(
- {OpTy, OpTy, CurFullTy, Record[0], Record[1], Record[2]});
+ {OpTy, OpTy, CurFullTy, Record[0], Record[1], Record[2], NextCstNo});
+ ++NextCstNo;
continue;
}
case bitc::CST_CODE_CE_SHUFVEC_EX: { // [opty, opval, opval, opval]
@@ -2745,7 +2748,8 @@ Error BitcodeReader::parseConstants() {
if (Record.size() < 4 || !RTy || !OpTy)
return error("Invalid record");
DelayedShuffles.push_back(
- {OpTy, RTy, CurFullTy, Record[1], Record[2], Record[3]});
+ {OpTy, RTy, CurFullTy, Record[1], Record[2], Record[3], NextCstNo});
+ ++NextCstNo;
continue;
}
case bitc::CST_CODE_CE_CMP: { // CE_CMP: [opty, opval, opval, pred]
diff --git a/llvm/test/Bitcode/vscale-shuffle.ll b/llvm/test/Bitcode/vscale-shuffle.ll
new file mode 100644
index 000000000000..3f36209c7aaf
--- /dev/null
+++ b/llvm/test/Bitcode/vscale-shuffle.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: verify-uselistorder < %s
+
+define void @f() {
+ %l = call <vscale x 16 x i8> @l(<vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> undef, i1 true, i32 0), <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer))
+ %i = add <vscale x 2 x i64> undef, shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 1, i32 0), <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer)
+ unreachable
+}
+
+declare <vscale x 16 x i8> @l(<vscale x 16 x i1>)
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