[llvm] 09b8dbf - [PhaseOrdering][NewPM] update test that silently showed bug with SpeculativeExecutionPass; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-06-30T14:22:20-04:00
New Revision: 09b8dbf70c1a9ff3d9763e607c580a76a01087c3

URL: https://github.com/llvm/llvm-project/commit/09b8dbf70c1a9ff3d9763e607c580a76a01087c3
DIFF: https://github.com/llvm/llvm-project/commit/09b8dbf70c1a9ff3d9763e607c580a76a01087c3.diff

LOG: [PhaseOrdering][NewPM] update test that silently showed bug with SpeculativeExecutionPass; NFC

See D82735 / rG1a6cebb4d12c744699e23624f8afda5cbe216fe6

Added: 
    

Modified: 
    llvm/test/Transforms/PhaseOrdering/rotate.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/PhaseOrdering/rotate.ll b/llvm/test/Transforms/PhaseOrdering/rotate.ll
index e10a46cb8300..4661de3688e6 100644
--- a/llvm/test/Transforms/PhaseOrdering/rotate.ll
+++ b/llvm/test/Transforms/PhaseOrdering/rotate.ll
@@ -5,20 +5,12 @@
 ; This should become a single funnel shift through a combination
 ; of aggressive-instcombine, simplifycfg, and instcombine.
 ; https://bugs.llvm.org/show_bug.cgi?id=34924
-; These are equivalent, but the value name with the new-pm shows a bug -
-; this code should not have been converted to a speculative select with
-; an intermediate transform.
 
 define i32 @rotl(i32 %a, i32 %b) {
-; OLDPM-LABEL: @rotl(
-; OLDPM-NEXT:  entry:
-; OLDPM-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]])
-; OLDPM-NEXT:    ret i32 [[TMP0]]
-;
-; NEWPM-LABEL: @rotl(
-; NEWPM-NEXT:  entry:
-; NEWPM-NEXT:    [[SPEC_SELECT:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]])
-; NEWPM-NEXT:    ret i32 [[SPEC_SELECT]]
+; ANY-LABEL: @rotl(
+; ANY-NEXT:  entry:
+; ANY-NEXT:    [[COND:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]])
+; ANY-NEXT:    ret i32 [[COND]]
 ;
 entry:
   %cmp = icmp eq i32 %b, 0
@@ -35,4 +27,3 @@ end:
   %cond = phi i32 [ %or, %rotbb ], [ %a, %entry ]
   ret i32 %cond
 }
-