[PATCH] D82871: [SVE] Custom ISel for fixed length extract/insert_subvector.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 30 06:28:31 PDT 2020
paulwalker-arm created this revision.
Herald added subscribers: llvm-commits, psnobl, jfb, rkruppe, hiraditya, tschuett.
Herald added a reviewer: efriedma.
Herald added a project: LLVM.
paulwalker-arm added a reviewer: cameron.mcinally.
We use extact_subvector and insert_subvector to "cast" between
fixed length and scalable vectors. This patch adds custom c++
based ISel for the following cases:
fixed_vector = ISD::EXTRACT_SUBVECTOR scalable_vector, 0
scalable_vector = ISD::INSERT_SUBVECTOR undef(scalable_vector), fixed_vector, 0
Which result in either EXTRACT_SUBREG/INSERT_SUBREG for NEON sized
vectors or COPY_TO_REGCLASS otherwise.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D82871
Files:
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-fixed-length-subvector.ll
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