[PATCH] D82705: [X86-64] Support Intel AMX instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86RegisterInfo.td:637
+let isAllocatable = 0 in
+def VTILE : RegisterClass<"X86", [untyped], 0,
+                          (sequence "TMM%u", 0, 7)> {let Size = 8192;}
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I think this should be just TILE. The V seems unnecessary and in every other case means Vector. This is more like a matrix so vector doesn't make sense


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82705/new/

https://reviews.llvm.org/D82705