[PATCH] D73940: GlobalISel: Reimplement moreElementsVectorDst

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 274217.
arsenm added a comment.

Rebase and fix comment


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73940/new/

https://reviews.llvm.org/D73940

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll

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