[PATCH] D82463: [AMDGPU] Spill more than wavesize CSR SGPRs

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll:30
+define void @spill_more_than_wavesize_csr_sgprs_with_stack_object() {
+  %alloca = alloca i32, align 4, addrspace(5)
+  call void asm sideeffect "",
----------------
I think you need "store volatile i32 0, i32 addrspace(5)* %alloca" as well or there is no stack object.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82463/new/

https://reviews.llvm.org/D82463