[PATCH] D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 26 03:46:01 PDT 2020
foad accepted this revision.
foad added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:517-520
+
+ if (Src0 && Src1 && Src0->isReg() && Src1->isReg() &&
+ Src0->getReg() == Src1->getReg() &&
+ Src0->getSubReg() == Src1->getSubReg()) {
----------------
This looks technically OK now. I still think it would be cleaner to structure the code as:
```
if (Use == Src0) {
// do it
} else if (Use == Src1 && commutable && Src0 not identical to Src1) {
// commute and do it
} else {
// fail
}
```
But I'll leave that up to your judgement.
================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:518-520
+ if (Src0 && Src1 && Src0->isReg() && Src1->isReg() &&
+ Src0->getReg() == Src1->getReg() &&
+ Src0->getSubReg() == Src1->getSubReg()) {
----------------
Could use MachineOperand::isIdenticalTo ?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D82551/new/
https://reviews.llvm.org/D82551
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