[PATCH] D82292: [SelectionDAG] Lower @llvm.get.active.lane.mask to setcc

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer updated this revision to Diff 273468.
SjoerdMeijer added a comment.

> I know I wrote "just replace the ADD with UADDO, and AND the overflow result with the compare result", but I think you need to NOT the overflow vector before the AND.

Yep, thanks, redoing my pen-and-paper exercise with some numbers plugged in, to also confirm this.

  viv  = [ i i i i ]
  step = [ 0 1 2 3 ]
  [i+0 i+1 i+2 i+3 ], [ 0 0 1 1 ] = uaddo [ i i i i ], [ 0 1 2 3 ]
  vecbtc = [ btc btc btc btc]
  [ 1 1 1 0 ] = setcc ule [i+0 i+1 i+2 i+3 ], [ btc btc btc btc]
  [ 0 0 1 0 ] = and [ 1 1 1 0], [ 0 0 1 1 ]
    ^^^^
    wrong: lanes 0 and 1 should be enabled, lanes 2 and 3 should be disabled
    because of overflow in these lanes.

Replacing the last line with:

  [ 1 1 0 0 ] = not [ 0 0 1 1 ]
  [ 1 1 0 0 ] = and [ 1 1 1 0 ], [ 1 1 0 0 ]

gives the first 2 lanes enabled, and the last 2 disabled.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82292/new/

https://reviews.llvm.org/D82292

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/Thumb2/active_lane_mask.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D82292.273468.patch
Type: text/x-patch
Size: 14009 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200625/f02628f2/attachment.bin>