[PATCH] D82483: [SVE] Code generation for fixed length vector adds.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm updated this revision to Diff 273417.
paulwalker-arm added a comment.

Thanks Dave, turns out changing FADD to custom lowering is breaking the cost model test.  I've added an entry to restore the original cost because lowering to SVE should not add additional cost beyond requiring a predicate, which is likely to be spread across many instructions.

This should be extended to more ISD nodes, hence me using plurals within the comment, but currently we only test FADD so I'm keeping my change minimal.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82483/new/

https://reviews.llvm.org/D82483

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-arith.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-arith.ll

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