[PATCH] D82524: [SVE][CodeGen] Fix bug when falling back to DAG ISel

[David Sherwood via Phabricator via llvm-commits]

david-arm created this revision.
david-arm added reviewers: sdesmalen, ctetreau, kmclaughlin.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
Herald added a project: LLVM.

In an earlier commit 584d0d5c1749c13625a5d322178ccb4121eea610 <https://reviews.llvm.org/rG584d0d5c1749c13625a5d322178ccb4121eea610> I
added functionality to allow AArch64 CodeGen support for falling
back to DAG ISel when Global ISel encounters scalable vector
types. However, it seems that we were not falling back early
enough as llvm::getLLTForType was still being invoked for scalable
vector types.

I've added a new fallback function to the call lowering class in
order to catch this problem early enough, rather than wait for
lowerFormalArguments to reject scalable vector types.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82524

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
  llvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll


Index: llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -220,7 +220,7 @@
   ret void
 }
 
-; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower arguments{{.*}}scalable_arg
+; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower function{{.*}}scalable_arg
 ; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_arg
 define <vscale x 16 x i8> @scalable_arg(<vscale x 16 x i1> %pred, i8* %addr) #1 {
   %res = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, i8* %addr)
Index: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
===================================================================
--- llvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
+++ llvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
@@ -37,6 +37,8 @@
                    ArrayRef<Register> VRegs,
                    Register SwiftErrorVReg) const override;
 
+  bool fallBackToDAGISel(const Function &F) const override;
+
   bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
                             ArrayRef<ArrayRef<Register>> VRegs) const override;
 
Index: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
+++ llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
@@ -427,6 +427,14 @@
   }
 }
 
+bool AArch64CallLowering::fallBackToDAGISel(const Function &F) const {
+  for (auto &Arg : F.args()) {
+    if (isa<ScalableVectorType>(Arg.getType()))
+      return true;
+  }
+  return false;
+}
+
 bool AArch64CallLowering::lowerFormalArguments(
     MachineIRBuilder &MIRBuilder, const Function &F,
     ArrayRef<ArrayRef<Register>> VRegs) const {
@@ -438,9 +446,6 @@
   SmallVector<ArgInfo, 8> SplitArgs;
   unsigned i = 0;
   for (auto &Arg : F.args()) {
-    if (isa<ScalableVectorType>(Arg.getType()))
-      return false;
-
     if (DL.getTypeStoreSize(Arg.getType()).isZero())
       continue;
 
Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -2391,6 +2391,14 @@
   // Make our arguments/constants entry block fallthrough to the IR entry block.
   EntryBB->addSuccessor(&getMBB(F.front()));
 
+  if (CLI->fallBackToDAGISel(F)) {
+    OptimizationRemarkMissed R("gisel-irtranslator", "GISelFailure",
+                               F.getSubprogram(), &F.getEntryBlock());
+    R << "unable to lower function: " << ore::NV("Prototype", F.getType());
+    reportTranslationError(*MF, *TPC, *ORE, R);
+    return false;
+  }
+
   // Lower the actual args into this basic block.
   SmallVector<ArrayRef<Register>, 8> VRegArgs;
   for (const Argument &Arg: F.args()) {
Index: llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
===================================================================
--- llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
+++ llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
@@ -290,6 +290,10 @@
     return false;
   }
 
+  virtual bool fallBackToDAGISel(const Function &F) const {
+    return false;
+  }
+
   /// This hook must be implemented to lower the incoming (formal)
   /// arguments, described by \p VRegs, for GlobalISel. Each argument
   /// must end up in the related virtual registers described by \p VRegs.


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