[PATCH] D82472: [X86] Fix a typo error.
Pengfei Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 24 19:01:30 PDT 2020
pengfei updated this revision to Diff 273214.
pengfei added a comment.
Add a test case. Thanks Craig.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82472/new/
https://reviews.llvm.org/D82472
Files:
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/test/CodeGen/X86/bug80500.ll
Index: llvm/test/CodeGen/X86/bug80500.ll
===================================================================
--- llvm/test/CodeGen/X86/bug80500.ll
+++ llvm/test/CodeGen/X86/bug80500.ll
@@ -8,7 +8,7 @@
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl $-2004318071, %edx # imm = 0x88888889
-; CHECK-NEXT: mulxl %eax, %eax, %eax
+; CHECK-NEXT: mulxl (%eax), %eax, %eax
; CHECK-NEXT: shrl $3, %eax
; CHECK-NEXT: retl
%v = load i32, i32* %p, align 4
Index: llvm/lib/Target/X86/X86MCInstLower.cpp
===================================================================
--- llvm/lib/Target/X86/X86MCInstLower.cpp
+++ llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -518,7 +518,7 @@
switch (OutMI.getOpcode()) {
default: llvm_unreachable("Invalid opcode");
case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break;
- case X86::MULX32Hrm: NewOpc = X86::MULX32rr; break;
+ case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break;
case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break;
case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break;
}
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