[PATCH] D82494: [AArch64][SVE] Only support nxv8bf16 if supported by subtarget

Cullen Rhodes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 24 12:28:44 PDT 2020


c-rhodes created this revision.
c-rhodes added reviewers: sdesmalen, efriedma, kmclaughlin, fpetrogalli.
Herald added subscribers: danielkiss, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a project: LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82494

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp


Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -179,11 +179,13 @@
     addRegisterClass(MVT::nxv8f16, &AArch64::ZPRRegClass);
     addRegisterClass(MVT::nxv2bf16, &AArch64::ZPRRegClass);
     addRegisterClass(MVT::nxv4bf16, &AArch64::ZPRRegClass);
-    addRegisterClass(MVT::nxv8bf16, &AArch64::ZPRRegClass);
     addRegisterClass(MVT::nxv2f32, &AArch64::ZPRRegClass);
     addRegisterClass(MVT::nxv4f32, &AArch64::ZPRRegClass);
     addRegisterClass(MVT::nxv2f64, &AArch64::ZPRRegClass);
 
+    if (Subtarget->hasBF16())
+      addRegisterClass(MVT::nxv8bf16, &AArch64::ZPRRegClass);
+
     if (useSVEForFixedLengthVectors()) {
       for (MVT VT : MVT::integer_fixedlen_vector_valuetypes())
         if (useSVEForFixedLengthVectorVT(VT))


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