[lld] 8131ef5 - [LLD][PowerPC] Add support for R_PPC64_GOT_PCREL34
Kamau Bridgeman via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 24 05:41:28 PDT 2020
Author: Stefan Pintilie
Date: 2020-06-24T07:40:35-05:00
New Revision: 8131ef5d635bc01b398c8648ea921f2891aaa9d2
URL: https://github.com/llvm/llvm-project/commit/8131ef5d635bc01b398c8648ea921f2891aaa9d2
DIFF: https://github.com/llvm/llvm-project/commit/8131ef5d635bc01b398c8648ea921f2891aaa9d2.diff
LOG: [LLD][PowerPC] Add support for R_PPC64_GOT_PCREL34
Add support for the 34bit relocation R_PPC64_GOT_PCREL34 for
PC Relative in LLD.
Reviewers: sfertile, MaskRay
Differential Revision: https://reviews.llvm.org/D81948
Added:
lld/test/ELF/ppc64-reloc-got-pcrel34.s
Modified:
lld/ELF/Arch/PPC64.cpp
Removed:
################################################################################
diff --git a/lld/ELF/Arch/PPC64.cpp b/lld/ELF/Arch/PPC64.cpp
index cadbf9ad3ec2..0764dabe45f8 100644
--- a/lld/ELF/Arch/PPC64.cpp
+++ b/lld/ELF/Arch/PPC64.cpp
@@ -671,6 +671,8 @@ RelExpr PPC64::getRelExpr(RelType type, const Symbol &s,
case R_PPC64_TOC16_HI:
case R_PPC64_TOC16_LO:
return R_GOTREL;
+ case R_PPC64_GOT_PCREL34:
+ return R_GOT_PC;
case R_PPC64_TOC16_HA:
case R_PPC64_TOC16_LO_DS:
return config->tocOptimize ? R_PPC64_RELAX_TOC : R_GOTREL;
@@ -1012,6 +1014,17 @@ void PPC64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
(val & si1Mask));
break;
}
+ case R_PPC64_GOT_PCREL34: {
+ const uint64_t si0Mask = 0x00000003ffff0000;
+ const uint64_t si1Mask = 0x000000000000ffff;
+ const uint64_t fullMask = 0x0003ffff0000ffff;
+ checkInt(loc, val, 34, rel);
+
+ uint64_t instr = readPrefixedInstruction(loc) & ~fullMask;
+ writePrefixedInstruction(loc, instr | ((val & si0Mask) << 16) |
+ (val & si1Mask));
+ break;
+ }
default:
llvm_unreachable("unknown relocation");
}
diff --git a/lld/test/ELF/ppc64-reloc-got-pcrel34.s b/lld/test/ELF/ppc64-reloc-got-pcrel34.s
new file mode 100644
index 000000000000..4e5cf97b7ae9
--- /dev/null
+++ b/lld/test/ELF/ppc64-reloc-got-pcrel34.s
@@ -0,0 +1,51 @@
+# REQUIRES: ppc
+# RUN: echo 'SECTIONS { \
+# RUN: .text_low 0x10010000: { *(.text_low) } \
+# RUN: .text_high 0x10080000 : { *(.text_high) } \
+# RUN: }' > %t.script
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
+# RUN: ld.lld -T %t.script --shared %t.o -o %t
+# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
+# RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELA
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=future %t | FileCheck %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t.o
+# RUN: ld.lld -T %t.script --shared %t.o -o %t
+# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
+# RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELA
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=future %t | FileCheck %s
+
+.text
+.section .text_low, "ax", %progbits
+# CHECK-LABEL: <GlobIntPCRel>:
+# CHECK-NEXT: pld 3, 458928(0), 1
+# CHECK-NEXT: lwa 3, 0(3)
+# SYMBOL: Symbol table '.dynsym' contains 4 entries:
+# SYMBOL: 00000000 0 NOTYPE GLOBAL DEFAULT UND glob_int
+# RELA: 100800b0 0000000100000014 R_PPC64_GLOB_DAT 0000000000000000 glob_int + 0
+GlobIntPCRel:
+ pld 3, glob_int at got@PCREL(0), 1
+ lwa 3, 0(3)
+ blr
+
+# CHECK-LABEL: <GlobIntPCRelOffset>:
+# CHECK-NEXT: pld 3, 458920(0), 1
+# CHECK-NEXT: lwa 3, 8(3)
+# SYMBOL: 00000000 0 NOTYPE GLOBAL DEFAULT UND glob_int8
+# RELA: 100800b8 0000000200000014 R_PPC64_GLOB_DAT 0000000000000000 glob_int8 + 0
+GlobIntPCRelOffset:
+ pld 3, glob_int8 at got@PCREL(0), 1
+ lwa 3, 8(3)
+ blr
+
+# CHECK-LABEL: <GlobIntPCRelBigOffset>:
+# CHECK-NEXT: pld 3, 192(0), 1
+# CHECK-NEXT: lwa 3, 64(3)
+# SYMBOL: 00000000 0 NOTYPE GLOBAL DEFAULT UND glob_int8_big
+# RELA: 100800c0 0000000300000014 R_PPC64_GLOB_DAT 0000000000000000 glob_int8_big + 0
+.section .text_high, "ax", %progbits
+GlobIntPCRelBigOffset:
+ pld 3, glob_int8_big at got@PCREL(0), 1
+ lwa 3, 64(3)
+ blr
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