[PATCH] D82441: [PowerPC] add a target hook shouldHoistCheapInstructions for machine licm to hoist cheap instruction on PowerPC

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 24 02:07:55 PDT 2020


shchenz created this revision.
shchenz added reviewers: hfinkel, jsji, nemanjai, PowerPC.
Herald added subscribers: llvm-commits, steven.zhang, wuzish, asbirlea, kbarton, hiraditya.
Herald added a project: LLVM.
shchenz added a comment.
shchenz edited the summary of this revision.

**NOTE**: I have not added a test case for this patch. The case is a little hard to construct. 
Currently, most cheap instructions on PowerPC are rematerializable. Rematerializable instructions will be hoisted before we check the register pressure in `CanCauseHighRegPressure`.

Since the logic here is quite straightforward, I leave this patch without a test case. I hope this is ok.

I will post another patch related to hoist rematerializable instructions based on this one. That patch will have a case to indicate the benefit of this hook.


PowerPC cores should always prefers hoisting cheap instruction out side of loop when register pressure is not calculated as high.

There is same statement in https://reviews.llvm.org/rL225471.

This patch adds a target hook `shouldHoistCheapInstructions` for machine licm and set it to true on PowerPC. Thus machine licm will hoist cheap instructions when register pressure is not high for PowerPC target.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82441

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/MachineLICM.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.h


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.h
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrInfo.h
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.h
@@ -314,6 +314,10 @@
     return false;
   }
 
+  /// Hoist cheap instructions when not limited by register pressure in Machine
+  /// LICM.
+  bool shouldHoistCheapInstructions() const override { return true; }
+
   bool useMachineCombiner() const override {
     return true;
   }
Index: llvm/lib/CodeGen/MachineLICM.cpp
===================================================================
--- llvm/lib/CodeGen/MachineLICM.cpp
+++ llvm/lib/CodeGen/MachineLICM.cpp
@@ -1205,9 +1205,10 @@
     unsigned Class = RPIdAndCost.first;
     int Limit = RegLimit[Class];
 
-    // Don't hoist cheap instructions if they would increase register pressure,
-    // even if we're under the limit.
-    if (CheapInstr && !HoistCheapInsts)
+    // If target prefers not to hoist cheap instructions, don't hoist them, even
+    // if we're under the limit.
+    if (CheapInstr &&
+        (!HoistCheapInsts && !TII->shouldHoistCheapInstructions()))
       return true;
 
     for (const auto &RP : BackTrace)
Index: llvm/include/llvm/CodeGen/TargetInstrInfo.h
===================================================================
--- llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1531,6 +1531,9 @@
                                 const MachineInstr &DefMI,
                                 unsigned DefIdx) const;
 
+  /// Specify whether a target should hoist cheap instructions.
+  virtual bool shouldHoistCheapInstructions() const { return false; }
+
   /// Perform target-specific instruction verification.
   virtual bool verifyInstruction(const MachineInstr &MI,
                                  StringRef &ErrInfo) const {


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