[PATCH] D81711: [SDAG] Add new AssertAlign ISD node.
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 22 12:54:40 PDT 2020
arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1723-1734
+ // TODO: Should this try to use a scalar add pseudo if the base address
+ // is uniform and saddr is usable?
+ SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
+ SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32);
- SDNode *N0Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
- DL, MVT::i32, N0, Sub0);
- SDNode *N0Hi = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
- DL, MVT::i32, N0, Sub1);
+ SDNode *N0Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
+ MVT::i32, N0, Sub0);
----------------
hliao wrote:
> arsenm wrote:
> > hliao wrote:
> > > arsenm wrote:
> > > > Lots of unrelated formatting changes?
> > > That's due to the extra indent added from L1680. Also, the lint progress in arc review tries to re-formatting all changed code.
> > Could switch to early return and avoid it?
> That code just conditionally refine `Addr` and, eventually, all paths need to join L1760 to prepare all the return values. Unless `goto` is used or code duplication, early return cannot be used here.
Duplicating the trivial case isn't a big deal
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81711/new/
https://reviews.llvm.org/D81711
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