[PATCH] D82194: [AMDGPU] Enable compare operations to be selected by divergence

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5305
+    }
       break;
 
----------------
Move brake inside the brace to fix the formatting.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5432
+     }
+       continue;
     }
----------------
Also move continue inside the brace.


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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5869
   const TargetRegisterClass *Src1RC = Src1.isReg() ?
-    MRI.getRegClass(Src1.getReg()) :
+    RI.getRegClassForReg(MRI, Src1.getReg()) :
     &AMDGPU::SGPR_32RegClass;
----------------
Reformat this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82194/new/

https://reviews.llvm.org/D82194