[PATCH] D81638: AMDGPU/GlobalISel: Fix 96 and 128 local loads and stores

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin updated this revision to Diff 272441.
mbrkusanin edited the summary of this revision.
mbrkusanin added a comment.

Sorry, I was away for a few days.

Now for CI and VI, b96 and b128 have minimal alignment of 16, gfx9 and onward has minimal alignment of 4 (anything lower then 4 is already broken down for all targets).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81638/new/

https://reviews.llvm.org/D81638

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
  llvm/lib/Target/AMDGPU/DSInstructions.td
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll

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