[PATCH] D82257: [X86] Add vector support to targetShrinkDemandedConstant for OR/XOR opcodes

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon updated this revision to Diff 272410.
RKSimon edited the summary of this revision.
RKSimon added a comment.

Add DemandedElts support to ShrinkDemandedConstant/targetShrinkDemandedConstant which fixes the poor vector codegen


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82257/new/

https://reviews.llvm.org/D82257

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/test/CodeGen/X86/promote-cmp.ll
  llvm/test/CodeGen/X86/setcc-lowering.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D82257.272410.patch
Type: text/x-patch
Size: 19380 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200622/8cb943ef/attachment-0001.bin>