[llvm] 48d1a2d - [DAG] Add SimplifyMultipleUseDemandedVectorElts helper for SimplifyMultipleUseDemandedBits. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 22 06:24:52 PDT 2020
Author: Simon Pilgrim
Date: 2020-06-22T14:24:39+01:00
New Revision: 48d1a2d6d06e41b6dc8ff7bdf4a1277120367dc7
URL: https://github.com/llvm/llvm-project/commit/48d1a2d6d06e41b6dc8ff7bdf4a1277120367dc7
DIFF: https://github.com/llvm/llvm-project/commit/48d1a2d6d06e41b6dc8ff7bdf4a1277120367dc7.diff
LOG: [DAG] Add SimplifyMultipleUseDemandedVectorElts helper for SimplifyMultipleUseDemandedBits. NFCI.
We have many cases where we call SimplifyMultipleUseDemandedBits and demand specific vector elements, but all the bits from them - this adds a helper wrapper to handle this.
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 6238184e4e85..4a3aeae7f08a 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -3315,6 +3315,13 @@ class TargetLowering : public TargetLoweringBase {
SelectionDAG &DAG,
unsigned Depth = 0) const;
+ /// Helper wrapper around SimplifyMultipleUseDemandedBits, demanding all
+ /// bits from only some vector elements.
+ SDValue SimplifyMultipleUseDemandedVectorElts(SDValue Op,
+ const APInt &DemandedElts,
+ SelectionDAG &DAG,
+ unsigned Depth = 0) const;
+
/// Look at Vector Op. At this point, we know that only the DemandedElts
/// elements of the result of Op are ever used downstream. If we can use
/// this information to simplify Op, create a new simplified DAG node and
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 3b412e0bc52c..5ff95808c3e8 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -852,6 +852,14 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
Depth);
}
+SDValue TargetLowering::SimplifyMultipleUseDemandedVectorElts(
+ SDValue Op, const APInt &DemandedElts, SelectionDAG &DAG,
+ unsigned Depth) const {
+ APInt DemandedBits = APInt::getAllOnesValue(Op.getScalarValueSizeInBits());
+ return SimplifyMultipleUseDemandedBits(Op, DemandedBits, DemandedElts, DAG,
+ Depth);
+}
+
/// Look at Op. At this point, we know that only the OriginalDemandedBits of the
/// result of Op are ever used downstream. If we can use this information to
/// simplify Op, create a new simplified DAG node and return true, returning the
@@ -2323,14 +2331,10 @@ bool TargetLowering::SimplifyDemandedVectorElts(
// Helper for demanding the specified elements and all the bits of both binary
// operands.
auto SimplifyDemandedVectorEltsBinOp = [&](SDValue Op0, SDValue Op1) {
- unsigned NumBits0 = Op0.getScalarValueSizeInBits();
- unsigned NumBits1 = Op1.getScalarValueSizeInBits();
- APInt DemandedBits0 = APInt::getAllOnesValue(NumBits0);
- APInt DemandedBits1 = APInt::getAllOnesValue(NumBits1);
- SDValue NewOp0 = SimplifyMultipleUseDemandedBits(
- Op0, DemandedBits0, DemandedElts, TLO.DAG, Depth + 1);
- SDValue NewOp1 = SimplifyMultipleUseDemandedBits(
- Op1, DemandedBits1, DemandedElts, TLO.DAG, Depth + 1);
+ SDValue NewOp0 = SimplifyMultipleUseDemandedVectorElts(Op0, DemandedElts,
+ TLO.DAG, Depth + 1);
+ SDValue NewOp1 = SimplifyMultipleUseDemandedVectorElts(Op1, DemandedElts,
+ TLO.DAG, Depth + 1);
if (NewOp0 || NewOp1) {
SDValue NewOp = TLO.DAG.getNode(
Opcode, SDLoc(Op), VT, NewOp0 ? NewOp0 : Op0, NewOp1 ? NewOp1 : Op1);
@@ -2511,11 +2515,10 @@ bool TargetLowering::SimplifyDemandedVectorElts(
// Attempt to avoid multi-use ops if we don't need anything from them.
if (!DemandedSrcElts.isAllOnesValue() ||
!DemandedSubElts.isAllOnesValue()) {
- APInt DemandedBits = APInt::getAllOnesValue(VT.getScalarSizeInBits());
- SDValue NewSrc = SimplifyMultipleUseDemandedBits(
- Src, DemandedBits, DemandedSrcElts, TLO.DAG, Depth + 1);
- SDValue NewSub = SimplifyMultipleUseDemandedBits(
- Sub, DemandedBits, DemandedSubElts, TLO.DAG, Depth + 1);
+ SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts(
+ Src, DemandedSrcElts, TLO.DAG, Depth + 1);
+ SDValue NewSub = SimplifyMultipleUseDemandedVectorElts(
+ Sub, DemandedSubElts, TLO.DAG, Depth + 1);
if (NewSrc || NewSub) {
NewSrc = NewSrc ? NewSrc : Src;
NewSub = NewSub ? NewSub : Sub;
@@ -2542,9 +2545,8 @@ bool TargetLowering::SimplifyDemandedVectorElts(
// Attempt to avoid multi-use ops if we don't need anything from them.
if (!DemandedElts.isAllOnesValue()) {
- APInt DemandedBits = APInt::getAllOnesValue(VT.getScalarSizeInBits());
- SDValue NewSrc = SimplifyMultipleUseDemandedBits(
- Src, DemandedBits, DemandedSrcElts, TLO.DAG, Depth + 1);
+ SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts(
+ Src, DemandedSrcElts, TLO.DAG, Depth + 1);
if (NewSrc) {
SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, NewSrc,
Op.getOperand(1));
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 90de46b65102..31bdaabcfa95 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36929,12 +36929,10 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
// Aggressively peek through ops to get at the demanded elts.
// TODO - we should do this for all target/faux shuffles ops.
if (!DemandedElts.isAllOnesValue()) {
- APInt DemandedSrcBits =
- APInt::getAllOnesValue(N0.getScalarValueSizeInBits());
- SDValue NewN0 = SimplifyMultipleUseDemandedBits(
- N0, DemandedSrcBits, DemandedLHS, TLO.DAG, Depth + 1);
- SDValue NewN1 = SimplifyMultipleUseDemandedBits(
- N1, DemandedSrcBits, DemandedRHS, TLO.DAG, Depth + 1);
+ SDValue NewN0 = SimplifyMultipleUseDemandedVectorElts(N0, DemandedLHS,
+ TLO.DAG, Depth + 1);
+ SDValue NewN1 = SimplifyMultipleUseDemandedVectorElts(N1, DemandedRHS,
+ TLO.DAG, Depth + 1);
if (NewN0 || NewN1) {
NewN0 = NewN0 ? NewN0 : N0;
NewN1 = NewN1 ? NewN1 : N1;
@@ -37024,9 +37022,8 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
return true;
// Aggressively peek through src to get at the demanded elt.
// TODO - we should do this for all target/faux shuffles ops.
- APInt SrcBits = APInt::getAllOnesValue(SrcVT.getScalarSizeInBits());
- if (SDValue NewSrc = SimplifyMultipleUseDemandedBits(Src, SrcBits, SrcElts,
- TLO.DAG, Depth + 1))
+ if (SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts(
+ Src, SrcElts, TLO.DAG, Depth + 1))
return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc));
break;
}
More information about the llvm-commits
mailing list