[PATCH] D82262: [RISCV] Optimize addition with an immediate

[Ben Shi via Phabricator via llvm-commits]

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benshi001 added a comment.

for (add i32 %a, 4094), it can be simplfied to
addi a0, a0, 2047
addi a0, a0, 2047.

The original assembly is
lui a1, 1
addi a1, a1, -2
add a0, a0, a1

However, this optimization can only be performed if the value generated by lui-addi has no other use.


benshi001 added a comment.

My information,

name = Ben Shi
email = powerman1st at 163.com


For some additions with an immediate in specific ranges, a pair of
addi-addi can be generated instead of the ordinary lui-addi-add serial.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82262

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/test/CodeGen/RISCV/add-imm.ll

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