[PATCH] D82257: [X86] Add vector support to targetShrinkDemandedConstant for OR/XOR opcodes

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, lebedev.ri.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

If we only demand the lsb of a constant build vector used in a OR/XOR op then sign extend it to an allsignbits bool pattern.

This also requires SimplifyDemandedBits XOR handling to be modified to call ShrinkDemandedConstant on any (non-NOT) XOR pattern to account for non-splat cases.

Next step towards fixing PR45808 - with this patch we now get a <-1,-1,0,0> v4i64 constant instead of <1,1,0,0>- the next step will be to get materializeVectorConstant to handle that.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82257

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/promote-cmp.ll
  llvm/test/CodeGen/X86/setcc-lowering.ll

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