[PATCH] D82215: [AMDGPU] Avoid redundant mode register writes

[Tim Corringham via Phabricator via llvm-commits]

timcorringham created this revision.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.
timcorringham added reviewers: arsenm, tpr, foad.

The SIModeRegister pass attempts to generate the minimal number of
writes to the mode register. However it was failing to correctly
deal with some loops, resulting in some redundant setreg instructions
being inserted.

This change amends the pass to avoid generating these redundant
instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82215

Files:
  llvm/lib/Target/AMDGPU/SIModeRegister.cpp
  llvm/test/CodeGen/AMDGPU/mode-register.mir

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