[llvm] fe0a85f - [X86][SSE] Fold MOVMSK(PCMPEQ(X, 0)) == -1 -> PTESTZ(X, X)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 18 07:38:55 PDT 2020
Author: Simon Pilgrim
Date: 2020-06-18T15:38:32+01:00
New Revision: fe0a85faf49fd8bc2e26bf92dc7cf96955b31646
URL: https://github.com/llvm/llvm-project/commit/fe0a85faf49fd8bc2e26bf92dc7cf96955b31646
DIFF: https://github.com/llvm/llvm-project/commit/fe0a85faf49fd8bc2e26bf92dc7cf96955b31646.diff
LOG: [X86][SSE] Fold MOVMSK(PCMPEQ(X,0)) == -1 -> PTESTZ(X,X)
Allow combineSetCCMOVMSK to handle 'allof' X == 0 patterns to be replaced with PTESTZ
This is a preliminary patch before properly handling PR35129
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8db6c7c7f689..ed936afcf538 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -40533,6 +40533,17 @@ static SDValue combineSetCCMOVMSK(SDValue EFLAGS, X86::CondCode &CC,
}
}
+ // MOVMSK(PCMPEQ(X,0)) == -1 -> PTESTZ(X,X).
+ if ((IsAllOf && CC == X86::COND_E) && Subtarget.hasSSE41()) {
+ SDValue BC = peekThroughBitcasts(Vec);
+ if (BC.getOpcode() == X86ISD::PCMPEQ &&
+ ISD::isBuildVectorAllZeros(BC.getOperand(1).getNode())) {
+ MVT TestVT = VecVT.is128BitVector() ? MVT::v2i64 : MVT::v4i64;
+ SDValue V = DAG.getBitcast(TestVT, BC.getOperand(0));
+ return DAG.getNode(X86ISD::PTEST, SDLoc(EFLAGS), MVT::i32, V, V);
+ }
+ }
+
// See if we can avoid a PACKSS by calling MOVMSK on the sources.
// For vXi16 cases we can use a v2Xi8 PMOVMSKB. We must mask out
// sign bits prior to the comparison with zero unless we know that
diff --git a/llvm/test/CodeGen/X86/vector-reduce-and-bool.ll b/llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
index 2a4964cd5501..c83fe01ce058 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
@@ -867,19 +867,13 @@ define i1 @icmp_v2i64_v2i1(<2 x i64>) {
;
; SSE41-LABEL: icmp_v2i64_v2i1:
; SSE41: # %bb.0:
-; SSE41-NEXT: pxor %xmm1, %xmm1
-; SSE41-NEXT: pcmpeqq %xmm0, %xmm1
-; SSE41-NEXT: movmskpd %xmm1, %eax
-; SSE41-NEXT: cmpb $3, %al
+; SSE41-NEXT: ptest %xmm0, %xmm0
; SSE41-NEXT: sete %al
; SSE41-NEXT: retq
;
; AVX-LABEL: icmp_v2i64_v2i1:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vmovmskpd %xmm0, %eax
-; AVX-NEXT: cmpb $3, %al
+; AVX-NEXT: vptest %xmm0, %xmm0
; AVX-NEXT: sete %al
; AVX-NEXT: retq
;
@@ -918,21 +912,24 @@ define i1 @icmp_v2i64_v2i1(<2 x i64>) {
}
define i1 @icmp_v4i32_v4i1(<4 x i32>) {
-; SSE-LABEL: icmp_v4i32_v4i1:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm1, %xmm1
-; SSE-NEXT: pcmpeqd %xmm0, %xmm1
-; SSE-NEXT: movmskps %xmm1, %eax
-; SSE-NEXT: cmpb $15, %al
-; SSE-NEXT: sete %al
-; SSE-NEXT: retq
+; SSE2-LABEL: icmp_v4i32_v4i1:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pxor %xmm1, %xmm1
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: cmpb $15, %al
+; SSE2-NEXT: sete %al
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: icmp_v4i32_v4i1:
+; SSE41: # %bb.0:
+; SSE41-NEXT: ptest %xmm0, %xmm0
+; SSE41-NEXT: sete %al
+; SSE41-NEXT: retq
;
; AVX-LABEL: icmp_v4i32_v4i1:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vmovmskps %xmm0, %eax
-; AVX-NEXT: cmpb $15, %al
+; AVX-NEXT: vptest %xmm0, %xmm0
; AVX-NEXT: sete %al
; AVX-NEXT: retq
;
@@ -1039,30 +1036,30 @@ define i1 @icmp_v8i16_v8i1(<8 x i8>) {
}
define i1 @icmp_v16i8_v16i1(<16 x i8>) {
-; SSE-LABEL: icmp_v16i8_v16i1:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm1, %xmm1
-; SSE-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE-NEXT: pmovmskb %xmm1, %eax
-; SSE-NEXT: cmpw $-1, %ax
-; SSE-NEXT: sete %al
-; SSE-NEXT: retq
+; SSE2-LABEL: icmp_v16i8_v16i1:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pxor %xmm1, %xmm1
+; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
+; SSE2-NEXT: pmovmskb %xmm1, %eax
+; SSE2-NEXT: cmpw $-1, %ax
+; SSE2-NEXT: sete %al
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: icmp_v16i8_v16i1:
+; SSE41: # %bb.0:
+; SSE41-NEXT: ptest %xmm0, %xmm0
+; SSE41-NEXT: sete %al
+; SSE41-NEXT: retq
;
; AVX-LABEL: icmp_v16i8_v16i1:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vpmovmskb %xmm0, %eax
-; AVX-NEXT: cmpw $-1, %ax
+; AVX-NEXT: vptest %xmm0, %xmm0
; AVX-NEXT: sete %al
; AVX-NEXT: retq
;
; AVX512F-LABEL: icmp_v16i8_v16i1:
; AVX512F: # %bb.0:
-; AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX512F-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
-; AVX512F-NEXT: vpmovmskb %xmm0, %eax
-; AVX512F-NEXT: cmpw $-1, %ax
+; AVX512F-NEXT: vptest %xmm0, %xmm0
; AVX512F-NEXT: sete %al
; AVX512F-NEXT: retq
;
@@ -1128,10 +1125,7 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>) {
;
; AVX2-LABEL: icmp_v4i64_v4i1:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vmovmskpd %ymm0, %eax
-; AVX2-NEXT: cmpb $15, %al
+; AVX2-NEXT: vptest %ymm0, %ymm0
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@@ -1199,10 +1193,7 @@ define i1 @icmp_v8i32_v8i1(<8 x i32>) {
;
; AVX2-LABEL: icmp_v8i32_v8i1:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpcmpeqd %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vmovmskps %ymm0, %eax
-; AVX2-NEXT: cmpb $-1, %al
+; AVX2-NEXT: vptest %ymm0, %ymm0
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@@ -1308,15 +1299,22 @@ define i1 @icmp_v16i16_v16i1(<16 x i16>) {
}
define i1 @icmp_v32i8_v32i1(<32 x i8>) {
-; SSE-LABEL: icmp_v32i8_v32i1:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm1
-; SSE-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE-NEXT: pmovmskb %xmm1, %eax
-; SSE-NEXT: cmpw $-1, %ax
-; SSE-NEXT: sete %al
-; SSE-NEXT: retq
+; SSE2-LABEL: icmp_v32i8_v32i1:
+; SSE2: # %bb.0:
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: pxor %xmm1, %xmm1
+; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
+; SSE2-NEXT: pmovmskb %xmm1, %eax
+; SSE2-NEXT: cmpw $-1, %ax
+; SSE2-NEXT: sete %al
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: icmp_v32i8_v32i1:
+; SSE41: # %bb.0:
+; SSE41-NEXT: por %xmm1, %xmm0
+; SSE41-NEXT: ptest %xmm0, %xmm0
+; SSE41-NEXT: sete %al
+; SSE41-NEXT: retq
;
; AVX1-LABEL: icmp_v32i8_v32i1:
; AVX1: # %bb.0:
@@ -1333,10 +1331,7 @@ define i1 @icmp_v32i8_v32i1(<32 x i8>) {
;
; AVX2-LABEL: icmp_v32i8_v32i1:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vpmovmskb %ymm0, %eax
-; AVX2-NEXT: cmpl $-1, %eax
+; AVX2-NEXT: vptest %ymm0, %ymm0
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@@ -1637,17 +1632,26 @@ define i1 @icmp_v32i16_v32i1(<32 x i16>) {
}
define i1 @icmp_v64i8_v64i1(<64 x i8>) {
-; SSE-LABEL: icmp_v64i8_v64i1:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm3, %xmm3
-; SSE-NEXT: por %xmm2, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pcmpeqb %xmm3, %xmm1
-; SSE-NEXT: pmovmskb %xmm1, %eax
-; SSE-NEXT: cmpw $-1, %ax
-; SSE-NEXT: sete %al
-; SSE-NEXT: retq
+; SSE2-LABEL: icmp_v64i8_v64i1:
+; SSE2: # %bb.0:
+; SSE2-NEXT: por %xmm3, %xmm1
+; SSE2-NEXT: pxor %xmm3, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm1
+; SSE2-NEXT: por %xmm0, %xmm1
+; SSE2-NEXT: pcmpeqb %xmm3, %xmm1
+; SSE2-NEXT: pmovmskb %xmm1, %eax
+; SSE2-NEXT: cmpw $-1, %ax
+; SSE2-NEXT: sete %al
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: icmp_v64i8_v64i1:
+; SSE41: # %bb.0:
+; SSE41-NEXT: por %xmm3, %xmm1
+; SSE41-NEXT: por %xmm2, %xmm1
+; SSE41-NEXT: por %xmm0, %xmm1
+; SSE41-NEXT: ptest %xmm1, %xmm1
+; SSE41-NEXT: sete %al
+; SSE41-NEXT: retq
;
; AVX1-LABEL: icmp_v64i8_v64i1:
; AVX1: # %bb.0:
@@ -1667,10 +1671,7 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; AVX2-LABEL: icmp_v64i8_v64i1:
; AVX2: # %bb.0:
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vpmovmskb %ymm0, %eax
-; AVX2-NEXT: cmpl $-1, %eax
+; AVX2-NEXT: vptest %ymm0, %ymm0
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
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