[llvm] e7816f2 - [InlineSpiller] add assert about spills post terminators

[Nick Desaulniers via llvm-commits]

Author: Nick Desaulniers
Date: 2020-06-17T11:51:58-07:00
New Revision: e7816f263b14578e2d926d2ee2d32db21e6ae95b

URL: https://github.com/llvm/llvm-project/commit/e7816f263b14578e2d926d2ee2d32db21e6ae95b
DIFF: https://github.com/llvm/llvm-project/commit/e7816f263b14578e2d926d2ee2d32db21e6ae95b.diff

LOG: [InlineSpiller] add assert about spills post terminators

Summary:
This invariant is being violated in the test case
https://reviews.llvm.org/D77849, related to the use of the relatively
new ability for callbr to have return values, and MachineBasicBlocks
with INLINEASM_BR terminators to emit live out register defs.

As noted in the comment, this triggers invariant violations in
MachineVerifier via `llc -verify-machineinstrs` or
`llc -verify-regalloc`, since only MachineInstrs that are terminators
are allowed to follow the first terminator.

https://reviews.llvm.org/D75098 may rework this very assertion if we're
spilling via a (proposed) TCOPY MachineInstr.

Reviewers: void, efriedma, arsenm

Reviewed By: efriedma

Subscribers: qcolombet, wdng, hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78166

Added: 
    

Modified: 
    llvm/lib/CodeGen/InlineSpiller.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index 17c8af9c0073..90dfaf67b062 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -945,6 +945,9 @@ static bool isRealSpill(const MachineInstr &Def) {
 /// insertSpill - Insert a spill of NewVReg after MI.
 void InlineSpiller::insertSpill(unsigned NewVReg, bool isKill,
                                  MachineBasicBlock::iterator MI) {
+  // Spill are not terminators, so inserting spills after terminators will
+  // violate invariants in MachineVerifier.
+  assert(!MI->isTerminator() && "Inserting a spill after a terminator");
   MachineBasicBlock &MBB = *MI->getParent();
 
   MachineInstrSpan MIS(MI, &MBB);