[PATCH] D77152: [SelectionDAG] Better legalization for FSHL and FSHR

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:6038
+  if (auto *C = dyn_cast<ConstantSDNode>(Z))
+    return C->getZExtValue() % BW != 0;
+
----------------
I'd recommend C->getAPIntValue().urem(BW) instead - the fuzzer will catch this at some point........


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:6043
+      if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
+        if (C->getZExtValue() % BW == 0)
+          return false;
----------------
C->getAPIntValue().urem(BW) 


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:6053
+  return false;
+}
+
----------------
You might be able to use ISD::matchUnaryPredicate to do some of this - so you just need to provide a predicate lambda


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77152/new/

https://reviews.llvm.org/D77152