[PATCH] D81860: [ARM] Fix crash trying to generate i1 immediates

[Mikael Holmén via Phabricator via llvm-commits]

uabelho added inline comments.


================
Comment at: llvm/test/CodeGen/Thumb2/mve-vmovimm.ll:549
+  %broadcast.splat1968 = shufflevector <4 x i1> %broadcast.splatinsert1967, <4 x i1> undef, <4 x i32> zeroinitializer
+  %l699 = and <4 x i1> %broadcast.splat1968, <i1 true, i1 false, i1 false, i1 false>
+  %s = select <4 x i1> %l699, <4 x i32> %a, <4 x i32> %b
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Hi!
I've no idea if this might be a real problem or not, but I noticed when I ran this testcase that we end up in this code in BuildVectorSDNode::isConstantSplat (SelectionDAG.cpp line 9660):

```
  // FIXME: This does not work for vectors with elements less than 8 bits.
  while (VecWidth > 8) {
    unsigned HalfSize = VecWidth / 2;

```
with VT being v4i1. VecWidth is 4 so the loop won't do anything in this case.
At least according to the FIXME it doesn't seem good, but perhaps the comment is overly cautious.
(I just thought I'd share this since in our downstream clone we have an assert there that suddenly failed on this testcase.)


Repository:
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  https://reviews.llvm.org/D81860/new/

https://reviews.llvm.org/D81860