[PATCH] D81539: [NFC]][PowerPC] Remove unused intrinsic for old CTR loop pass

[Zhang Kang via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGc2574dc9f707: [NFC]][PowerPC] Remove unused intrinsic for old CTR loop pass (authored by ZhangKang).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81539/new/

https://reviews.llvm.org/D81539

Files:
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll


Index: llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll
+++ llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll
@@ -6,11 +6,11 @@
 
 define void @test(i64 %arg.ssa, i64 %arg.nb) local_unnamed_addr {
 ; Ensure that loop rotation doesn't duplicate the call to
-; llvm.ppc.is.decremented.ctr.nonzero
+; llvm.loop.decrement
 ; CHECK-LABEL: test
-; CHECK: call i1 @llvm.ppc.is.decremented.ctr.nonzero
-; CHECK-NOT: call i1 @llvm.ppc.is.decremented.ctr.nonzero
-; CHECK: declare i1 @llvm.ppc.is.decremented.ctr.nonzero
+; CHECK: call i1 @llvm.loop.decrement
+; CHECK-NOT: call i1 @llvm.loop.decrement
+; CHECK: declare i1 @llvm.loop.decrement
 entry:
   switch i32 undef, label %BB_8 [
     i32 -2, label %BB_9
@@ -31,7 +31,7 @@
 BB_3:                                          ; preds = %BB_1
   %1 = add i64 %arg.ssa, %bcount.1.us
   %2 = add i64 %1, 1
-  %3 = call i1 @llvm.ppc.is.decremented.ctr.nonzero()
+  %3 = call i1 @llvm.loop.decrement.i32(i32 1)
   br i1 %3, label %BB_4, label %BB_7
 
 BB_4:                                          ; preds = %BB_3
@@ -62,14 +62,14 @@
   br i1 undef, label %BB_11, label %BB_12
 
 BB_12:                                         ; preds = %BB_11
-  call void @llvm.ppc.mtctr.i64(i64 %arg.nb)
+  call void @llvm.set.loop.iterations.i64(i64 %arg.nb)
   br label %BB_1
 }
 
 ; Function Attrs: nounwind
-declare void @llvm.ppc.mtctr.i64(i64) #0
+declare void @llvm.set.loop.iterations.i64(i64) #0
 
 ; Function Attrs: nounwind
-declare i1 @llvm.ppc.is.decremented.ctr.nonzero() #0
+declare i1 @llvm.loop.decrement.i32(i32) #0
 
 attributes #0 = { nounwind }
Index: llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -293,7 +293,7 @@
         if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
           switch (F->getIntrinsicID()) {
           default: continue;
-          // If we have a call to ppc_is_decremented_ctr_nonzero, or ppc_mtctr
+          // If we have a call to loop_decrement or set_loop_iterations,
           // we're definitely using CTR.
           case Intrinsic::set_loop_iterations:
           case Intrinsic::loop_decrement:
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -41,15 +41,6 @@
   // eieio instruction
   def int_ppc_eieio : Intrinsic<[],[],[]>;
 
-  // Intrinsics used to generate ctr-based loops. These should only be
-  // generated by the PowerPC backend!
-  // The branch intrinsic is marked as NoDuplicate because loop rotation will
-  // attempt to duplicate it forming loops where a block reachable from one
-  // instance of it can contain another.
-  def int_ppc_mtctr : Intrinsic<[], [llvm_anyint_ty], []>;
-  def int_ppc_is_decremented_ctr_nonzero :
-    Intrinsic<[llvm_i1_ty], [], [IntrNoDuplicate]>;
-
   // Intrinsics for [double]word extended forms of divide instructions
   def int_ppc_divwe : GCCBuiltin<"__builtin_divwe">,
                       Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],


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