[PATCH] D80999: [ARM][CodeGen] Enabling spilling of high registers in RegAllocFast for Thumb1

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> Please correct me if I'm wrong, but from what I've checked the pass's dependency on LR not being live is simply to allow it to replace unconditional branches that are out of range with BL instructions, which overrides the contents of LR.

Correct.  The problem would be if lr were live across a branch.  If an inline asm has lr as an input or output, lr has a live range which could contain a branch. Even if there aren't any such branches when regalloc runs, later transforms can introduce them.  (ConstantIslands itself can introduce branches, but I'm not sure if those branches would ever need to be relaxed.)

It's definitely realistic to construct a testcase at higher optimization levels.  Thinking about it a bit more, I'm having trouble coming up with a testcase that would trigger at -O0 specifically, though. It would be difficult to construct a testcase where lr is alive across a branch during isel, given the way inline asm operands are constructed, and the post-isel optimizations are very limited.

> Also, the pass doesn't seem to handle the contents of inline asm, keeping the user's assembly code as it is.

Correct.


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https://reviews.llvm.org/D80999