[PATCH] D81961: [AVR] Implement disassembly of 32-bit instructions

[Ayke via Phabricator via llvm-commits]

aykevl created this revision.
aykevl added a reviewer: dylanmckay.
Herald added subscribers: llvm-commits, Jim, hiraditya.
Herald added a project: LLVM.
aykevl edited the summary of this revision.

This needed two fixes:

- 32-bit instructions were read in the wrong order. The machine code swaps the two 16-bit instruction words, which wasn't undone when decoding instructions.
- Jump and call instructions don't encode the lowest address bit, which is always zero. Therefore, the address needed to be shifted by one to fix that.

---

Note: I didn't add all address decode tests to the call instruction as all of that should already be tested with the jmp instruction (which has the same format). I can of course add it if needed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81961

Files:
  llvm/lib/Target/AVR/AVRInstrInfo.td
  llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
  llvm/test/MC/AVR/inst-call.s
  llvm/test/MC/AVR/inst-jmp.s
  llvm/test/MC/AVR/inst-lds.s
  llvm/test/MC/AVR/inst-sts.s

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