[PATCH] D81224: [AMDGPU] Fix failure in VCC spilling
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 16 08:16:12 PDT 2020
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
LGTM with test nit
================
Comment at: llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir:16
+
+# CHECK-LABEL: name: check_vcc
+# CHECK: $vgpr0 = V_WRITELANE_B32_{{(vi|gfx10)}} $vcc_lo, 0, undef $vgpr0
----------------
I think I'd go for generated mir checks in this case rather than the manual checks
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81224/new/
https://reviews.llvm.org/D81224
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