[PATCH] D81908: [MIPS] Fix incorrect relocations of instruction

[hev via Phabricator via llvm-commits]

hev marked 3 inline comments as done.
hev added a comment.

Thanks for review.



================
Comment at: llvm/test/MC/Mips/reloc-implicit-constraints-error.s:9
+
+.globl end
+  ori  $4, $4, start            # O32: [[@LINE]]:{{[0-9]+}}: error: should use explicit constraints
----------------
atanasyan wrote:
> Do you need this line in the test?
No.


================
Comment at: llvm/test/MC/Mips/reloc-implicit-constraints-error.s:10
+.globl end
+  ori  $4, $4, start            # O32: [[@LINE]]:{{[0-9]+}}: error: should use explicit constraints
+                                # N64: [[@LINE-1]]:{{[0-9]+}}: error: should use explicit constraints
----------------
atanasyan wrote:
> You do not need to use two separate check prefixes O32 and N64:
> ```
> ori  $4, $4, start            # CHECK: [[@LINE]]:{{[0-9]+}}: error: should use explicit constraints
> ```
I will remove it.


================
Comment at: llvm/test/MC/Mips/reloc-implicit-constraints-error.s:16
+
+  addiu  $4, $4, start          # O32: [[@LINE]]:{{[0-9]+}}: error: should use explicit constraints
+                                # N64: [[@LINE-1]]:{{[0-9]+}}: error: should use explicit constraints
----------------
atanasyan wrote:
> Do you need to check both `ori` and `addiu` instructions?
I think yes, It is used to check the changes of some instructions in the future. e.g. The behavior of the li instruction is different from that of addiu.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D81908/new/

https://reviews.llvm.org/D81908