[PATCH] D81897: [AArch64][GlobalISel] Avoid creating redundant ubfx when selecting G_ZEXT

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.
Herald added a project: LLVM.

When selecting 32 b -> 64 b G_ZEXTs, we don't have to always emit the extend.

If the instruction feeding into the G_ZEXT implicitly zero extends the high half of the register, we can just emit a SUBREG_TO_REG instead.

This gives some minor code size improvements on SPECINT2000:

test-suite...INT2000/164.gzip/164.gzip.test -0.7%
test-suite...T2000/300.twolf/300.twolf.test -0.2%
test-suite...T2000/256.bzip2/256.bzip2.test -0.1%
test-suite...000/186.crafty/186.crafty.test -0.1%
test-suite.../CINT2000/176.gcc/176.gcc.test -0.1%
test-suite.../CINT2000/175.vpr/175.vpr.test -0.1%
test-suite...0/253.perlbmk/253.perlbmk.test -0.1%
test-suite...000/197.parser/197.parser.test -0.1%
test-suite...000/255.vortex/255.vortex.test -0.1%
test-suite.../CINT2000/254.gap/254.gap.test -0.0%
test-suite.../CINT2000/252.eon/252.eon.test -0.0%
test-suite.../CINT2000/181.mcf/181.mcf.test 0.0%

Example of a function where this appears: https://godbolt.org/z/hFdLZB (extracted from 433.milc)


https://reviews.llvm.org/D81897

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-redundant-zext.mir

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