[PATCH] D81707: [PowerPC][Power10] Implement Vector Clear Left/Rightmost Bytes Builtins in LLVM/Clang
Lei Huang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 15 12:38:33 PDT 2020
lei accepted this revision as: lei.
lei added a comment.
This revision is now accepted and ready to land.
LGTM
Minor nit to be addressed during commit.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:522
+ [(set v16i8:$vD,
+ (int_ppc_altivec_vclrlb v16i8:$vA, i32:$rB))]>;
+ def VCLRRB : VXForm_1<461, (outs vrrc:$vD), (ins vrrc:$vA, gprc:$rB),
----------------
nit: indentation.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:526
+ [(set v16i8:$vD,
+ (int_ppc_altivec_vclrrb v16i8:$vA, i32:$rB))]>;
}
----------------
nit: indentation
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81707/new/
https://reviews.llvm.org/D81707
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